• Course code:63260
  • Credits:6
  • Semester: winter
  • Contents

We instruct students how computer-aided design tools are used to both simulate the VHDL or Verilog design and to synthesize the design to actual hardware. Specific behaviour of HDL tools is emphasized. We present the design of digital circuit using optimal approaches. As part of the course, students develop familiarity and confidence with designing, building and testing digital circuits, including the use of CAD tools, develop team-building skills and enhance technical knowledge through both written assignments and design projects.

  • Study programmes
  • Distribution of hours per semester
45
hours
lectures
20
hours
laboratory work
10
hours
tutorials
  • Professor
PB
Instructor
Room:R2.55 - Kabinet